New open and advanced IDM models are helping fabless semiconductor manufacturers address their SOC supply chain issues.
by Eugen Pfumfel, Principal Engineer, Toshiba Electronics Europe
For the most part, the ASIC route still offers the most cost effective route to market for semiconductor manufacturers, if it is handled correctly.
In fact, thanks to the trail blazing activities of Integrated Device Manufacturers (IDMs), who continue to invest in the latest technologies, the established process nodes have never been more accessible to manufacturers, particularly fabless semiconductor manufacturers and specifically for start-ups.
The majority of SOC devices shipped today are actually originated by fabless semiconductor companies, many of which could still be described as being in a start-up phase.
In this early phase, these companies have specific needs and demands that are difficult for foundries to meet. Consequently, Toshiba has developed a new, open and advanced IDM model that meets the needs of the fabless chip company, as well as being able to support OEMs with the classical ASIC (IDM) model.
It is easier to understand why this new model is necessary, if the current SOC supply chain is analysed from the perspective of the fabless semiconductor company.
In the early stages, a fabless semiconductor’s motivation for developing a SOC is to reduce production costs, but not necessarily go for the lowest possible cost level. More likely, it is to bring their product to market within a window of opportunity (innovative fast moving / growing markets) and using an appropriate technology. Crucially, their strengths will undoubtedly lie in the functionality of the device. Immediately it is clear that the client needs to work with a partner who is best placed to advise on this issue, and it doesn’t start and end with process technology. Later in maturing markets, production cost optimisation is the key for success, and this can also be offered by Toshiba via a pure foundry model.
Design hand-off
It all starts with a concept, but for any company today to approach an ASIC/SOC design with a clean sheet of paper is unfeasible; the use of 3rd Party IP is not only commonplace it has become essential. This represents potentially the most complex element of the supply chain for any company; how to co-ordinate the selection, delivery, integration and verification of multiple pieces of IP and design libraries, without being able to specify, at an early stage, the fabrication process targeted.
Without a team of dedicated specialists, the fabless semiconductor manufacturer could become embroiled in design details they are not best qualified to address. However, an IDM is perfectly placed to address these issues because it fits exactly their own internal design flow and management structure, and they are likely to already have working relationships with the IP and design library providers.
Once the design phase has been entered the manufacturer is faced with a potentially expensive and time-consuming learning curve, if the EDA tools are to be mastered to a degree where sign-off can occur. To alleviate this Toshiba accepts design hand-off at the RTL level, meaning companies can avoid investing in expensive tools and start with simple VHDL/Verilog design, allowing the customer to focus on their core competence and not the implementation, including synthesis and Design for Test (DFT). For fabless companies, handing over a netlist is often the preferred solution as it protects their IP.
To support the customer’s core competence, Toshiba also offers a host of design services, which includes CPU sub-system design, DFT and DFM (Design for Manufacturing), and the provision of mixed signal and standard digital IP, all of which can be provided by Toshiba or one of its qualified 3rd Party partners. To speed application development Toshiba offers local competence and support through its European LSI Design and Engineering Centre (ELDEC).
If the customer’s core competence includes mixed signal design, then GDS hand-off is requested. Here, Toshiba can also reduce the cost of design by offering its own analogue physical design kit (PDK), but still offering top-level and digital layout service from ELDEC.
Knowledge transfer
Because the Toshiba ASIC & Foundry service is based on its own CMOS process development – it is fully qualified and works seamlessly with the Toshiba CMOS libraries. With dedicated LSI logic production lines, Toshiba continues to manufacture devices at the um node but has recently announced its fully qualified 65nm process, with 40nm tape-outs expected in early 2009.
Toshiba’s ASIC customers inherit all this technology, as it is used to develop and manufacture its own in-house ASSPs. The experience gained by developing devices targeting highly demanding and competitive markets is also offered to customers, which is where the IDM model really benefits the fabless manufacturer.
To remain competitive in its chosen markets, Toshiba also needs to invest in leading edge packaging technologies, a further benefit to its ASIC customers and another example of how using the IDM model simplifies the entire supply chain.
Toshiba operates its own assembly and testing facilities, from low pin-count QFN/QFP to various types of BGA packages and Wafer level chip scale packaging (WLCSP). For multi-chip devices, System in Package (SIP) is also available.
With an open and advanced IDM model, Toshiba is able to simplify the supply chain for SOC development, from design hand-off, to sourcing wafers, assembly and test. A close reporting structure ensures flexibility throughout the design and manufacture process, without sacrificing performance or yield, and also enables short turn-around-times.
Access to a local sales organisation helps customers with order processing and logistical issues. Toshiba, for example, has rolling forecast systems that anticipate peak demand and recognise overstocking.
Lastly, the ASIC model offers a more attractive cashflow for customers who only pay after final product delivery rather than after every production step, when dealing with multiple organizations.
Further information about Toshiba ASIC & Foundry services could be found at www.toshiba-components.com/ASIC .
This article was published for the 2008 CONNECTIONS™ Conference Industry Insights, the official publication of CONNECTIONS™.
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